Non-volatile semiconductor memories are capable of storing data after power to the device has been turned off. In other words, the contents of the memory is maintain and is not destroyed when power is removed from the device. In contrast with volatile memory devices, such as static random access memories (SRAM) or dynamic random access memories (DRAM), the contents of the memory are destroyed after power is removed.
An electronically erasable programmable read only memory or EEPROM is one type of well known non-volatile memory. A typically EEPROM memory cell is a single transistor device having a source and drain formed in the substrate, a floating gate formed over the source and drain regions, and a control gate that is formed over the floating gate. The floating gate is considered “floating” because it is completely surrounded by an insulator, such as oxide, and is not electrically connected to any other circuitry in the device.
EEPROM cells typically have three states, programming, erase and read. In the program state, a charge is placed onto the floating gate sufficient to turn the transistor on (i.e., a channel is created between the source and drain regions in the substrate). For example with a P channel device, a negative charge of sufficient magnitude is provided on the floating gate to exceed the threshold voltage of the transistor. A high voltage is applied across the source and drain of the transistor. This causes electrons to travel from the source to the drain. Simultaneously, a high positive voltage is applied to the control gate. The high potential causes some of the electrons moving between the source and drain to “jump” through the insulation layer and become trapped on the floating gate. This process, sometimes referred to as “hot-electron injection”, causes the charge on the floating gate to become more negative. Eventually, the charge falls below the threshold voltage of the transistor, and the transistor remains in a permanent on state until the device is erased.
In the erase state, a positive charge is placed on the floating gate so that the voltage is less than the threshold voltage. As a result, the device is permanently off, and there is no electrical conduction between the source and drain. Erasure of the device can be accomplished in a number of different ways. For example, a high positive voltage can be applied to the bulk silicon. This will cause electrons to tunnel from the floating gate to the silicon. Alternatively, a high negative voltage can be applied to the control gate. This too will cause electrons to tunnel from the floating gate to the bulk silicon. In either case, the net charge on the floating gate becomes more positive and will eventually exceed the threshold voltage. When this occurs, the device turns off.
During a read operation, a voltage is applied between the source and drain. If the voltage of the floating gate is below the threshold, the device is programmed and current will flow between the source and drain. If the voltage of the floating gate is above the threshold, the device remains off, and no current flows between the source and drain. A sense amp is provided to measure or sense the current between the source and drain. If current is detected, then the sense amp determines that the cell is programmed. Otherwise, the sense amp determines that the cell is in the erased state. The program and erase states of the cell can be interpreted as a logical one or zero, or vice versa, depending on the design of the system.
It should be noted that the aforementioned discussion pertains to P-channel devices. With N-channel devices, the operation is essentially the complement of that described above. Lastly, the specific voltages applied to the device to induce either the program or erase state depends on the capacitive coupling between the components of the cell as is well known in the art.
The problem with the standard EEPROM memory cell is that it is capable of maintaining only two states, program and erase. It can not therefore receive an analog signal and store it as a digital signal.
An EEPROM cell that is capable of receiving an analog signal and storing it as a digital signal is therefore needed.